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138 lines
4.6 KiB
138 lines
4.6 KiB
//-----------------------------------------------------------------------------
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// 2023 Ahoy, https://github.com/lumpapu/ahoy
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// Creative Commons - http://creativecommons.org/licenses/by-nc-sa/3.0/de/
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//-----------------------------------------------------------------------------
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#ifndef __ESP32_3WSPI_H__
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#define __ESP32_3WSPI_H__
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#include "driver/spi_master.h"
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#include "esp_rom_gpio.h" // for esp_rom_gpio_connect_out_signal
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#include "Arduino.h"
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#if defined(ESP32)
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#define CLK_PIN 18
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#define MOSI_PIN 23
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#define MISO_PIN -1
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#endif
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#define SPI_CLK 1 * 1000 * 1000 // 1MHz
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template<uint8_t CSB_PIN=5, uint8_t FCSB_PIN=4, uint8_t GPIO3_PIN=15>
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class esp32_3wSpi {
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public:
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esp32_3wSpi() {}
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void setup() {
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spi_bus_config_t buscfg = {
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.mosi_io_num = MOSI_PIN,
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.miso_io_num = MISO_PIN,
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.sclk_io_num = CLK_PIN,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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.max_transfer_sz = 32,
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};
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spi_device_interface_config_t devcfg = {
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.command_bits = 0,
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.address_bits = 0,
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.dummy_bits = 0,
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.mode = 0, // SPI mode 0
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.clock_speed_hz = SPI_CLK, // 1 MHz
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.spics_io_num = CS_PIN,
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.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE,
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.queue_size = 1,
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.pre_cb = NULL,
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.post_cb = NULL,
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};
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ESP_ERROR_CHECK(spi_bus_initialize(SPI2_HOST, &buscfg, 0));
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ESP_ERROR_CHECK(spi_bus_add_device(SPI2_HOST, &devcfg, &spi_reg));
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// FiFo
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spi_device_interface_config_t devcfg2 = {
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.command_bits = 0,
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.address_bits = 0,
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.dummy_bits = 0,
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.mode = 0, // SPI mode 0
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.cs_ena_pretrans = 2,
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.cs_ena_posttrans = (uint8_t)(1 / (SPI_CLK * 10e6 * 2) + 2), // >2 us
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.clock_speed_hz = SPI_CLK, // 1 MHz
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.spics_io_num = FCS_PIN,
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.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE,
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.queue_size = 1,
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.pre_cb = NULL,
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.post_cb = NULL,
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};
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ESP_ERROR_CHECK(spi_bus_add_device(SPI2_HOST, &devcfg2, &spi_fifo));
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esp_rom_gpio_connect_out_signal(MOSI_PIN, spi_periph_signal[SPI2_HOST].spid_out, true, false);
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delay(100);
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pinMode(INTR_PIN, INPUT);
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}
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void writeReg(uint8_t addr, uint8_t reg) {
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uint8_t tx_data[2];
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tx_data[0] = ~addr;
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tx_data[1] = ~reg;
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spi_transaction_t t = {
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.length = 2 * 8,
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.tx_buffer = &tx_data,
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.rx_buffer = NULL
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};
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_reg, &t));
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delayMicroseconds(100);
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}
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uint8_t readReg(uint8_t addr) {
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uint8_t tx_data, rx_data;
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tx_data = ~(addr | 0x80); // negation and MSB high (read command)
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spi_transaction_t t = {
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.length = 8,
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.rxlength = 8,
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.tx_buffer = &tx_data,
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.rx_buffer = &rx_data
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};
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_reg, &t));
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delayMicroseconds(100);
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return rx_data;
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}
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void writeFifo(uint8_t buf[], uint8_t len) {
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uint8_t tx_data;
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spi_transaction_t t = {
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.flags = SPI_TRANS_MODE_OCT,
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.length = 8,
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.tx_buffer = &tx_data, // reference to write data
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.rx_buffer = NULL
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};
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for(uint8_t i = 0; i < len; i++) {
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tx_data = ~buf[i]; // negate buffer contents
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_fifo, &t));
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delayMicroseconds(4); // > 4 us
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}
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}
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void readFifo(uint8_t buf[], uint8_t len) {
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uint8_t rx_data;
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spi_transaction_t t = {
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.length = 8,
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.rxlength = 8,
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.tx_buffer = NULL,
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.rx_buffer = &rx_data
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};
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for(uint8_t i = 0; i < len; i++) {
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ESP_ERROR_CHECK(spi_device_polling_transmit(spi_fifo, &t));
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delayMicroseconds(4); // > 4 us
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buf[i] = rx_data;
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}
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}
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private:
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spi_device_handle_t spi_reg, spi_fifo;
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};
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#endif /*__ESP32_3WSPI_H__*/
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