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457 lines
15 KiB
457 lines
15 KiB
8 years ago
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Index: valgrind12305/configure.in
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===================================================================
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--- valgrind12305/configure.in (revision 12305)
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+++ valgrind12305/configure.in (working copy)
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@@ -143,6 +143,8 @@
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# configure-time, and distinguishes them from the VGA_*/VGO_*/VGP_*
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# variables used when compiling C files.
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+VGCONF_PLATFORM_ARM_ARCH=
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+
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AC_CANONICAL_HOST
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AC_MSG_CHECKING([for a supported CPU])
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@@ -179,15 +181,34 @@
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;;
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armv7*)
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- AC_MSG_RESULT([ok (${host_cpu})])
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- ARCH_MAX="arm"
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- ;;
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+ # This means we use a armv7 toolchain - at least Cortex-A8
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+ AC_MSG_RESULT([ok (${host_cpu})])
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+ ARCH_MAX="arm"
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+ VGCONF_PLATFORM_ARM_ARCH="-march=armv7 -mcpu=cortex-a8"
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+ AC_DEFINE(ARM_ARCH_V7,1,"Defined for v7 architectures")
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+ ;;
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+ armv6*)
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+ AC_MSG_RESULT([ok (${host_cpu})])
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+ ARCH_MAX="arm"
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+ VGCONF_PLATFORM_ARM_ARCH="-march=armv6"
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+ AC_DEFINE(ARM_ARCH_V6,1,"Defined for v6 architectures")
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+ ;;
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+
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+ arm*)
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+ # Generic arm toolchain - we will target armv5te
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+ AC_MSG_RESULT([(${host_cpu}) - will enforce armv5te when compiling])
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+ ARCH_MAX="arm"
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+ VGCONF_PLATFORM_ARM_ARCH="-march=armv5te"
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+ AC_DEFINE(ARM_ARCH_V5TE,1,"Defined for v5te architectures")
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+ ;;
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+
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*)
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AC_MSG_RESULT([no (${host_cpu})])
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AC_MSG_ERROR([Unsupported host architecture. Sorry])
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;;
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esac
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+AC_SUBST(VGCONF_PLATFORM_ARM_ARCH)
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#----------------------------------------------------------------------------
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Index: valgrind12305/Makefile.am
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===================================================================
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--- valgrind12305/Makefile.am (revision 12305)
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+++ valgrind12305/Makefile.am (working copy)
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@@ -3,18 +3,19 @@
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include $(top_srcdir)/Makefile.all.am
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-TOOLS = memcheck \
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- cachegrind \
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- callgrind \
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- massif \
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- lackey \
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- none \
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- helgrind \
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- drd
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+TOOLS = memcheck
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+# jfr cachegrind \
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+# jfr callgrind \
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+# jfr massif \
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+# jfr lackey \
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+# jfr none \
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+# jfr helgrind \
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+# jfr drd
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-EXP_TOOLS = exp-sgcheck \
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- exp-bbv \
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- exp-dhat
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+EXP_TOOLS =
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+# jfr exp-sgcheck \
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+# jfr exp-bbv \
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+# jfr exp-dhat
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# Put docs last because building the HTML is slow and we want to get
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# everything else working before we try it.
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@@ -28,9 +29,9 @@
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tests \
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perf \
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gdbserver_tests \
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- auxprogs \
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- mpi \
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- docs
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+ auxprogs
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+# jfr mpi \
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+# jfr docs
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DIST_SUBDIRS = $(SUBDIRS)
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SUPP_FILES = \
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Index: valgrind12305/coregrind/pub_core_transtab_asm.h
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===================================================================
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--- valgrind12305/coregrind/pub_core_transtab_asm.h (revision 12305)
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+++ valgrind12305/coregrind/pub_core_transtab_asm.h (working copy)
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@@ -58,12 +58,16 @@
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#if defined(VGA_x86) || defined(VGA_amd64)
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# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) ) & VG_TT_FAST_MASK)
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-#elif defined(VGA_s390x) || defined(VGA_arm)
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+#elif defined(VGA_s390x)
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# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 1) & VG_TT_FAST_MASK)
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#elif defined(VGA_ppc32) || defined(VGA_ppc64)
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# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK)
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+#elif defined(VGA_arm)
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+# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> (2- (1& _addr))) & VG_TT_FAST_MASK)
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+ /* shift by 2 if ARM mode, by 1 if Thumb mode */
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+
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#else
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# error "VG_TT_FAST_HASH: unknown platform"
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#endif
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Index: valgrind12305/coregrind/m_syswrap/syswrap-generic.c
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===================================================================
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--- valgrind12305/coregrind/m_syswrap/syswrap-generic.c (revision 12305)
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+++ valgrind12305/coregrind/m_syswrap/syswrap-generic.c (working copy)
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@@ -2025,8 +2025,19 @@
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mreq.rkind = MAny;
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}
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+ /* handle alignment to 4 pages we need for MAP_FIXED to succeed on ARM */
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+ vg_assert(VKI_SHMLBA >= VKI_PAGE_SIZE);
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+ if ( (arg4 & VKI_MAP_SHARED) && (arg1 == 0) && (VKI_SHMLBA > VKI_PAGE_SIZE) ) {
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+ mreq.len += VKI_SHMLBA - VKI_PAGE_SIZE;
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+ }
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/* Enquire ... */
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advised = VG_(am_get_advisory)( &mreq, True/*client*/, &mreq_ok );
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+ if (mreq_ok && (arg4 & VKI_MAP_SHARED) && (arg1 == 0) && (VKI_SHMLBA > VKI_PAGE_SIZE) ) {
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+ Addr newaddr = VG_ROUNDUP(advised, VKI_SHMLBA);
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+ mreq.len -= (newaddr - advised);
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+ advised = newaddr;
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+ }
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+
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if (!mreq_ok) {
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/* Our request was bounced, so we'd better fail. */
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return VG_(mk_SysRes_Error)( VKI_EINVAL );
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Index: valgrind12305/coregrind/m_dispatch/dispatch-arm-linux.S
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===================================================================
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--- valgrind12305/coregrind/m_dispatch/dispatch-arm-linux.S (revision 12305)
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+++ valgrind12305/coregrind/m_dispatch/dispatch-arm-linux.S (working copy)
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@@ -9,6 +9,9 @@
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Copyright (C) 2008-2011 Evan Geller
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gaze@bea.ms
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+ Copyright (C) 2011 John Reiser
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+ jreiser@BitWagon.com
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+ Sept+Oct 2011: Inner loops recoded for speed.
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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@@ -58,139 +61,134 @@
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/* set FPSCR to vex-required default value */
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mov r4, #0
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- fmxr fpscr, r4
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+ /* fmxr fpscr, r4 */
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/* r0 (hence also [sp,#0]) holds guest_state */
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/* r1 holds do_profiling */
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mov r8, r0
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ldr r0, [r8, #OFFSET_arm_R15T]
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-
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+
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/* fall into main loop (the right one) */
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cmp r1, #0 /* do_profiling */
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- beq VG_(run_innerloop__dispatch_unprofiled)
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- b VG_(run_innerloop__dispatch_profiled)
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+ bne VG_(run_innerloop__dispatch_profiled)
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+ // FALLTHROUGH b VG_(run_innerloop__dispatch_unprofiled)
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/*----------------------------------------------------*/
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/*--- NO-PROFILING (standard) dispatcher ---*/
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/*----------------------------------------------------*/
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-/* Pairing of insns below is my guesstimate of how dual dispatch would
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- work on an A8. JRS, 2011-May-28 */
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+// Pairing of insns below is how dual dispatch should work.
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+CLR_HI= 32 - VG_TT_FAST_BITS
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+CLR_LO= 32 - VG_TT_FAST_BITS
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+
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.global VG_(run_innerloop__dispatch_unprofiled)
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VG_(run_innerloop__dispatch_unprofiled):
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-
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/* AT ENTRY: r0 is next guest addr, r8 is possibly
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modified guest state ptr */
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- /* Has the guest state pointer been messed with? If yes, exit. */
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- movw r3, #:lower16:VG_(dispatch_ctr)
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tst r8, #1
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+ ldr r2,=VG_(dispatch_ctr)
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- movt r3, #:upper16:VG_(dispatch_ctr)
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+ bne gsp_changed // guest state pointer was modified
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+ movs r3, r0, LSR #1 // shift off Thumb mode bit; set Carry
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- bne gsp_changed
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+ ldr r5,=VG_(tt_fast)
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+ movcc r3, r3, LSR #1 // if ARM mode then shift off another bit
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- /* save the jump address in the guest state */
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- str r0, [r8, #OFFSET_arm_R15T]
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+ ldr r1, [r2] // dispatch_ctr
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+ mov r3, r3, LSL #CLR_HI // shift off hi bits
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- /* Are we out of timeslice? If yes, defer to scheduler. */
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- ldr r2, [r3]
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+ str r0, [r8, #OFFSET_arm_R15T] // save jump address into guest state
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+ add r5, r5, r3, LSR #CLR_LO -3 // r5= &tt_fast[entry#]
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- subs r2, r2, #1
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+ ldr r4, [r5, #0] // r4= .guest
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+ subs r1, r1, #1 // decrement timeslice
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- str r2, [r3]
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+ ldr r5, [r5, #4] // r5= .host
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+ beq counter_is_zero // out of timeslice ==> defer to scheduler
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- beq counter_is_zero
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+ adr lr, VG_(run_innerloop__dispatch_unprofiled) // &continuation
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+ cmp r4, r0 // check cache tag
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- /* try a fast lookup in the translation cache */
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- // r0 = next guest, r1,r2,r3,r4 scratch
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- movw r1, #VG_TT_FAST_MASK // r1 = VG_TT_FAST_MASK
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- movw r4, #:lower16:VG_(tt_fast)
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-
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- and r2, r1, r0, LSR #1 // r2 = entry #
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- movt r4, #:upper16:VG_(tt_fast) // r4 = &VG_(tt_fast)
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-
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- add r1, r4, r2, LSL #3 // r1 = &tt_fast[entry#]
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-
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- ldrd r4, r5, [r1, #0] // r4 = .guest, r5 = .host
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-
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- cmp r4, r0
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-
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- bne fast_lookup_failed
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+ streq r1, [r2] // match: update dispatch_ctr
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+ bxeq r5 // match: jump to .host, continue at *lr
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// r5: next-host r8: live, gsp
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// r4: next-guest
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- // r2: entry #
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+ // r2: &VG_(dispatch_ctr)
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+ // r1: VG_(dispatch_ctr)
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// LIVE: r5, r8; all others dead
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-
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- /* Found a match. Jump to .host. */
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- blx r5
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- b VG_(run_innerloop__dispatch_unprofiled)
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-.ltorg
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+fast_lookup_failed:
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+ movne r0, #VG_TRC_INNER_FASTMISS
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+counter_is_zero:
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+ moveq r0, #VG_TRC_INNER_COUNTERZERO
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+
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+/* All exits from the dispatcher go through here. %r0 holds
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+ the return value.
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+*/
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+run_innerloop_exit:
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+ /* We're leaving. Check that nobody messed with
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+ FPSCR in ways we don't expect. */
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+ /* fmrx r4, fpscr */
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+ bic r4, #0xF8000000 /* mask out NZCV and QC */
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+ bic r4, #0x0000009F /* mask out IDC,IXC,UFC,OFC,DZC,IOC */
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+ cmp r4, #0
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+invariant_violation:
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+ movne r0, #VG_TRC_INVARIANT_FAILED
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+
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+run_innerloop_exit_REALLY:
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+ add sp, sp, #8
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+ pop {r4, r5, r6, r7, r8, r9, fp, pc}
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/*NOTREACHED*/
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+.ltorg
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+
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/*----------------------------------------------------*/
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/*--- PROFILING dispatcher (can be much slower) ---*/
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/*----------------------------------------------------*/
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.global VG_(run_innerloop__dispatch_profiled)
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VG_(run_innerloop__dispatch_profiled):
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-
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/* AT ENTRY: r0 is next guest addr, r8 is possibly
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modified guest state ptr */
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- /* Has the guest state pointer been messed with? If yes, exit. */
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- movw r3, #:lower16:VG_(dispatch_ctr)
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- tst r8, #1
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+ tst r8, #1
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+ ldr r2,=VG_(dispatch_ctr)
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- movt r3, #:upper16:VG_(dispatch_ctr)
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+ bne gsp_changed // guest state pointer was modified
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+ movs r3, r0, LSR #1 // shift off Thumb mode bit; set Carry
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- bne gsp_changed
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+ ldr r5,=VG_(tt_fast)
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+ movcc r3, r3, LSR #1 // if ARM mode then shift off another bit
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- /* save the jump address in the guest state */
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- str r0, [r8, #OFFSET_arm_R15T]
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+ ldr r1, [r2] // dispatch_ctr
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+ mov r3, r3, LSL #CLR_HI // shift off hi bits
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- /* Are we out of timeslice? If yes, defer to scheduler. */
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- ldr r2, [r3]
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+ str r0, [r8, #OFFSET_arm_R15T] // save jump address into guest state
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+ add r5, r5, r3, LSR #CLR_LO -3 // r5= &tt_fast[entry#]
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- subs r2, r2, #1
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+ ldr r4, [r5, #0] // r4= .guest
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+ subs r1, r1, #1 // decrement timeslice
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- str r2, [r3]
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+ ldr r5, [r5, #4] // r5= .host
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+ beq counter_is_zero // out of timeslice ==> defer to scheduler
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- beq counter_is_zero
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+ cmp r4, r0 // check cache tag
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+ ldr r0, =VG_(tt_fastN)
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- /* try a fast lookup in the translation cache */
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- // r0 = next guest, r1,r2,r3,r4 scratch
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- movw r1, #VG_TT_FAST_MASK // r1 = VG_TT_FAST_MASK
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- movw r4, #:lower16:VG_(tt_fast)
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+ streq r1, [r2] // match: update dispatch_ctr
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+ bne fast_lookup_failed
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- and r2, r1, r0, LSR #1 // r2 = entry #
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- movt r4, #:upper16:VG_(tt_fast) // r4 = &VG_(tt_fast)
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+ ldr r0, [r0, r3, LSR #CLR_LO -2] // tt_fastN[entry#]
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+ adr lr, VG_(run_innerloop__dispatch_profiled) // &continuation
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+// r0 stall
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+ ldr r3, [r0]
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+// r3 stall
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+ add r3, r3, #1
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- add r1, r4, r2, LSL #3 // r1 = &tt_fast[entry#]
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-
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- ldrd r4, r5, [r1, #0] // r4 = .guest, r5 = .host
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-
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- cmp r4, r0
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-
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- bne fast_lookup_failed
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- // r5: next-host r8: live, gsp
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- // r4: next-guest
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- // r2: entry #
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- // LIVE: r5, r8; all others dead
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-
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- /* increment bb profile counter */
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- movw r0, #:lower16:VG_(tt_fastN)
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- movt r0, #:upper16:VG_(tt_fastN) // r0 = &tt_fastN[0]
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- ldr r0, [r0, r2, LSL #2] // r0 = tt_fast[entry #]
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- ldr r3, [r0] // *r0 ++
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- add r3, r3, #1
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- str r3, [r0]
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-
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- /* Found a match. Jump to .host. */
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- blx r5
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- b VG_(run_innerloop__dispatch_profiled)
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+ str r3, [r0]
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|
+ bx r5 // match: jump to .host, continue at *lr
|
||
|
/*NOTREACHED*/
|
||
|
|
||
|
/*----------------------------------------------------*/
|
||
|
@@ -212,49 +210,6 @@
|
||
|
b run_innerloop_exit
|
||
|
/*NOTREACHED*/
|
||
|
|
||
|
-counter_is_zero:
|
||
|
- /* R15T is up to date here */
|
||
|
- /* Back out increment of the dispatch ctr */
|
||
|
- ldr r1, =VG_(dispatch_ctr)
|
||
|
- ldr r2, [r1]
|
||
|
- add r2, r2, #1
|
||
|
- str r2, [r1]
|
||
|
- mov r0, #VG_TRC_INNER_COUNTERZERO
|
||
|
- b run_innerloop_exit
|
||
|
- /*NOTREACHED*/
|
||
|
-
|
||
|
-fast_lookup_failed:
|
||
|
- /* R15T is up to date here */
|
||
|
- /* Back out increment of the dispatch ctr */
|
||
|
- ldr r1, =VG_(dispatch_ctr)
|
||
|
- ldr r2, [r1]
|
||
|
- add r2, r2, #1
|
||
|
- str r2, [r1]
|
||
|
- mov r0, #VG_TRC_INNER_FASTMISS
|
||
|
- b run_innerloop_exit
|
||
|
- /*NOTREACHED*/
|
||
|
-
|
||
|
-/* All exits from the dispatcher go through here. %r0 holds
|
||
|
- the return value.
|
||
|
-*/
|
||
|
-run_innerloop_exit:
|
||
|
- /* We're leaving. Check that nobody messed with
|
||
|
- FPSCR in ways we don't expect. */
|
||
|
- fmrx r4, fpscr
|
||
|
- bic r4, #0xF8000000 /* mask out NZCV and QC */
|
||
|
- bic r4, #0x0000009F /* mask out IDC,IXC,UFC,OFC,DZC,IOC */
|
||
|
- cmp r4, #0
|
||
|
- bne invariant_violation
|
||
|
- b run_innerloop_exit_REALLY
|
||
|
-
|
||
|
-invariant_violation:
|
||
|
- mov r0, #VG_TRC_INVARIANT_FAILED
|
||
|
- b run_innerloop_exit_REALLY
|
||
|
-
|
||
|
-run_innerloop_exit_REALLY:
|
||
|
- add sp, sp, #8
|
||
|
- pop {r4, r5, r6, r7, r8, r9, fp, pc}
|
||
|
-
|
||
|
.size VG_(run_innerloop), .-VG_(run_innerloop)
|
||
|
|
||
|
|
||
|
Index: valgrind12305/coregrind/m_translate.c
|
||
|
===================================================================
|
||
|
--- valgrind12305/coregrind/m_translate.c (revision 12305)
|
||
|
+++ valgrind12305/coregrind/m_translate.c (working copy)
|
||
|
@@ -1533,8 +1533,8 @@
|
||
|
/* See comment in libvex.h. This target uses a
|
||
|
return-to-link-register scheme to get back to the dispatcher, so
|
||
|
both fields are NULL. */
|
||
|
- vta.dispatch_assisted = NULL;
|
||
|
- vta.dispatch_unassisted = NULL;
|
||
|
+ //vta.dispatch_assisted = NULL;
|
||
|
+ //vta.dispatch_unassisted = NULL;
|
||
|
|
||
|
# else
|
||
|
# error "Unknown arch"
|
||
|
Index: valgrind12305/Makefile.all.am
|
||
|
===================================================================
|
||
|
--- valgrind12305/Makefile.all.am (revision 12305)
|
||
|
+++ valgrind12305/Makefile.all.am (working copy)
|
||
|
@@ -160,9 +160,9 @@
|
||
|
|
||
|
AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
|
||
|
AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
|
||
|
- $(AM_CFLAGS_BASE) -marm -mcpu=cortex-a8
|
||
|
+ $(AM_CFLAGS_BASE) $(VGCONF_PLATFORM_ARM_ARCH)
|
||
|
AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ \
|
||
|
- -marm -mcpu=cortex-a8 -g
|
||
|
+ $(VGCONF_PLATFORM_ARM_ARCH) -g
|
||
|
|
||
|
AM_FLAG_M3264_X86_DARWIN = -arch i386
|
||
|
AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
|