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@ -177,24 +177,24 @@ |
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// LP Settings
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// LP Settings
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static uint8_t cmtConfig[0x60] PROGMEM { |
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static uint8_t cmtConfig[0x60] PROGMEM { |
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// 0x00 - 0x0f -- RSSI offset +- 0 and 13dBm
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// 0x00 - 0x0f
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0x00, 0x66, 0xEC, 0x1C, 0x70, 0x80, 0x14, 0x08, |
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0x00, 0x66, 0xEC, 0x1D, 0x70, 0x80, 0x14, 0x08, |
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0x11, 0x02, 0x02, 0x00, 0xAE, 0xE0, 0x35, 0x00, |
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0x91, 0x02, 0x02, 0xD0, 0xAE, 0xE0, 0x35, 0x00, |
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// 0x10 - 0x1f
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// 0x10 - 0x1f
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0x00, 0xF4, 0x10, 0xE2, 0x42, 0x20, 0x0C, 0x81, |
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0x00, 0xF4, 0x10, 0xE2, 0x42, 0x20, 0x0C, 0x81, |
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0x42, 0x32, 0xCF, 0x82, 0x42, 0x27, 0x76, 0x12, // 860MHz as default
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0x42, 0x32, 0xCF, 0x82, 0x42, 0x27, 0x76, 0x12, // 0x42, 0xCF, 0xA7, 0x8C, 0x42, 0xC4, 0x4E, 0x1C,
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// 0x20 - 0x2f
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// 0x20 - 0x2f
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0xA6, 0xC9, 0x20, 0x20, 0xD2, 0x35, 0x0C, 0x0A, |
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0xA6, 0xC9, 0x20, 0x20, 0xD2, 0x35, 0x0C, 0x0A, |
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0x9F, 0x4B, 0x29, 0x29, 0xC0, 0x14, 0x05, 0x53, |
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0x9F, 0x4B, 0x0A, 0x29, 0xC0, 0x14, 0x05, 0x53, // 0x9F, 0x4B, 0x29, 0x29, 0xC0, 0x14, 0x05, 0x53,
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// 0x30 - 0x3f
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// 0x30 - 0x3f
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0x10, 0x00, 0xB4, 0x00, 0x00, 0x01, 0x00, 0x00, |
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0x10, 0x00, 0xB4, 0x00, 0x00, 0x01, 0x00, 0x00, |
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0x12, 0x1E, 0x00, 0xAA, 0x06, 0x00, 0x00, 0x00, |
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0x12, 0x1E, 0x00, 0xAA, 0x06, 0x00, 0x00, 0x00, |
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// 0x40 - 0x4f
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// 0x40 - 0x4f
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0x00, 0x48, 0x5A, 0x48, 0x4D, 0x01, 0x1D, 0x00, |
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0x00, 0x48, 0x5A, 0x48, 0x4D, 0x01, 0x1D, 0x00, // 0x00, 0xD6, 0xD5, 0xD4, 0x2D, 0x01, 0x1D, 0x00,
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0x00, 0x00, 0x00, 0x00, 0xC3, 0x00, 0x00, 0x60, |
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0x00, 0x00, 0x00, 0x00, 0xC3, 0x00, 0x00, 0x60, |
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// 0x50 - 0x5f - TX 13dBm
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// 0x50 - 0x5f
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0xFF, 0x00, 0x00, 0x1F, 0x10, 0x70, 0x4D, 0x06, |
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0xFF, 0x00, 0x00, 0x1F, 0x10, 0x70, 0x4D, 0x06, |
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0x00, 0x07, 0x50, 0x00, 0x42, 0x0C, 0x3F, 0x7F |
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0x00, 0x07, 0x50, 0x00, 0x8A, 0x18, 0x3F, 0x7F |
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}; |
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}; |
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@ -235,6 +235,8 @@ class Cmt2300a { |
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if(mInRxMode) |
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if(mInRxMode) |
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return CMT_SUCCESS; |
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return CMT_SUCCESS; |
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DPRINTLN(DBG_INFO, "goRX"); |
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mSpi.readReg(CMT2300A_CUS_INT1_CTL); |
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mSpi.readReg(CMT2300A_CUS_INT1_CTL); |
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mSpi.writeReg(CMT2300A_CUS_INT1_CTL, CMT2300A_INT_SEL_TX_DONE); |
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mSpi.writeReg(CMT2300A_CUS_INT1_CTL, CMT2300A_INT_SEL_TX_DONE); |
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@ -318,7 +320,7 @@ class Cmt2300a { |
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mSpi.writeFifo(buf, len); |
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mSpi.writeFifo(buf, len); |
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if(0xff != mRqstCh) { |
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if(0xff != mRqstCh) { |
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DPRINTLN(DBG_INFO, "switchChannel: 0x" + String(mRqstCh, HEX)); |
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//DPRINTLN(DBG_INFO, "switchChannel: 0x" + String(mRqstCh, HEX));
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mCurCh = mRqstCh; |
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mCurCh = mRqstCh; |
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mRqstCh = 0xff; |
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mRqstCh = 0xff; |
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} |
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} |
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@ -348,8 +350,6 @@ class Cmt2300a { |
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mSpi.writeReg(i, cmtConfig[i]); |
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mSpi.writeReg(i, cmtConfig[i]); |
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} |
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} |
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//uint8_t tmp = (~0x07) & mSpi.readReg(CMT2300A_CUS_CMT10);
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//mSpi.writeReg(CMT2300A_CUS_CMT10, (tmp | 0x02));
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mSpi.writeReg(CMT2300A_CUS_IO_SEL, 0x20); // -> GPIO3_SEL[1:0] = 0x02
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mSpi.writeReg(CMT2300A_CUS_IO_SEL, 0x20); // -> GPIO3_SEL[1:0] = 0x02
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@ -383,7 +383,7 @@ class Cmt2300a { |
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if(!cmtSwitchStatus(CMT2300A_GO_STBY, CMT2300A_STA_STBY)) |
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if(!cmtSwitchStatus(CMT2300A_GO_STBY, CMT2300A_STA_STBY)) |
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return false; |
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return false; |
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switchDtuFreq(WORK_FREQ_KHZ); |
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//switchDtuFreq(WORK_FREQ_KHZ);
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return true; |
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return true; |
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} |
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} |
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